| Subject Code | Subject Name | L-T-P (Credit) | Faculty ABR | Faculty Assigned | Faculty Load in Hours |
| EC675 |
Mixed signal VLSI design |
4 |
MD |
Mangal Das |
3.0 |
| EC683 |
Design Lab II |
4 |
PG |
Priyanka Goyal |
4.0 |
| EC673 |
VLSI reliability engg |
3 |
RM |
Rajesh Mishra |
3.0 |
| EC665 |
VLSI ASIC Design |
3 |
VFE1 |
Visitng_Faculty_ECE_1 |
3.0 |
University Coordinator, Timetables
|